The MultiMatch Oscillator Synthesis Module can be used to synthesize a T- or PI-section cascade feedback network to provide the prescribed load termination for the transistor and the required loop gain (or negative resistance) for the oscillator, at each frequency of interest. Connecting lines, as well as pads, are now allowed during synthesis. This provides for oscillator synthesis up to artwork level.

When the small-signal parameters are used, the load-line is that at start-up. If a small-signal model for the transistor was extracted, the trans-conductance (g_m) used in this model can also be adjusted automatically (g_m-compression) in order to approximate the large-signal effect with a well-behaved load line. The load termination controlled in this case will the steady-state load termination. Series or shunt feedback can be used.

The load termination to be presented to the transistor and/or the feedback to be used can be specified. The loop gain or the required negative resistance in the feedback loop must also be specified. Default values for the loop gain, based on Johnson's formula for the compression at maximum output power, are provided. The loop-gain should only be controlled if the open-loop input resistance is positive - if not, the negative resistance should be controlled.

Only four of the six parameters associated with the three T- or PI-section impedances are required to control the load line and the loop gain/negative resistance. One of the impedances/admittances or two of the resistance/conductance values must be specified by the user. The usual choice is to choose two of the resistance | conductance values to be equal to zero. This ensures that most of the effective power delivered by the transistor will end up in the actual load termination. These resistance values can be used in a subsequent iteration to represent any varactor or resonator losses.

The output power can be extracted from any one of the three T- or PI-section impedances. However, if the power is extracted from the feedback position, the topology will be changed to have the load termination at the input or the output port of the circuit. When this circuit is analyzed with the analysis module, the loop gain will differ from that at synthesis (the loop for which the loop gain and load termination will be calculated will be different). It is, therefore, better to first change the configuration and to find suitable load terminations for the new configuration, before the final version of the oscillator is synthesized.

A table of the T- or PI-section impedances required to provide the specified loop gain or negative resistance, is created at each relevant frequency. These impedances are listed as a function of the angle around a load termination circle or as a function of the loop gain, as appropriate. The user can select any solution in a table. However, the choice made at the different frequencies should be such that the changes from one frequency to the next are smooth. The default choice is usually adequate.

Zoom capabilities are provided in these impedance/admittance tables to zoom out any required set of values in a table. The capability to search the tables automatically for any specified value of resistance or capacitance or inductance is also provided.

In deciding on the component type to be zoomed out, preference should be given to the commonly used oscillator topologies in order to prevent problems with spurious oscillation outside the oscillation band.

A table summarizing the solutions selected at the different frequencies is created. The reflection coefficients of the selected impedances can be displayed graphically.

Varactor or LC networks (with pads) can be synthesized to approximate the reactance associated with each lossless impedance (or a lossy impedance if the associated resistance was specified) in the feedback network over the frequency range of interest. The varactor capacitance ratio and parasitic inductance can be specified. Varactor losses can be lumped into a resistance in parallel (shunt feedback) or in series (series feedback) with the varactor reactance.

Series-tuned and shunt-tuned varactor networks are synthesized. If the varactor circuit passes through resonance or comes close to it in the oscillation band, one should avoid using a series-tuned varactor in an oscillator with shunt feedback, and vice versa.

Any impedance-matching network(s) required can be synthesized with the MultiMatch Impedance-Matching Module. Up to two impedance-matching networks can be used.

The schematic of the oscillator synthesized (matching networks excluded) can be displayed. A MultiMatch circuit file for the oscillator can be created automatically. The command required to ensure correct insertion of any impedance-matching network synthesized is inserted automatically into the circuit file created.

Several circuit files can (and should) be created in order to evaluate different possibilities. Impedance-matching data files for the impedance-matching problems to be solved can be created.

One of the impedance matching modules is required to synthesize any matching networks required. The solutions chosen will be inserted automatically into the previously created circuit file.

The oscillator synthesized can be analyzed with the Analysis Module.  The open-loop impedance, the feedback impedance, the loop gain and the effective load termination for the transistor can also be calculated. The loop gain can be displayed graphically on a Smith chart (with s₁₁ and s₂₂ , or 1/s₁₁^* and 1/s₂₂^*) or on a rectangular plot.

A unity gain circle is drawn on the Smith chart to indicate at which point the loop gain will be too low for oscillation (positive open loop resistance case). This is also useful for evaluating the likelihood of spurious oscillations.

The 0dB loop gain and the 0 degree (or 360 degrees and multiples of it) phase positions are also marked on a rectangular plot. The rectangular loop gain/loop phase plot greatly simplifies the process of deciding whether spurious oscillations will be a problem.

Parasitics can be added to the circuit in the analysis module, and appropriate adjustments can be made to restore the performance. The oscillator can also be fine-tuned by re-entering the synthesis module with the feedback, load termination and the loop gain specified.

The circuit can be translated into Super Compact^TM or Touchstone or Touchstone^TM format with the Analyses Module, and can also be transformed into microstrip form (with compensation of the discontinuity effects), if required. Schematic scripts can also be created for Microwave Office^TM.

The minimum requirements for oscillator synthesis are the Power Module Option, the Oscillator Synthesis Module, the Impedance-Matching Module and the Analysis Module.