The Ampsa Amplifier Design Wizard (ADW) takes a new approach towards amplifier design.

The prevalent approach to the design of RF and microwave circuits today is still the optimization approach. An initial solution is obtained by some means or other, and this solution is optimized (improved by using optimization techniques) with a general-purpose RF and microwave circuit simulator. While this approach is certainly workable, it is slow, depends heavily on the experience of the designer (or some other source) and usually yields inferior results. The requirement of initial solutions is also a major drawback.

• The optimization as provided in most circuit simulators is limited to a specific pre-defined topology.
• A circuit (amplifier) is usually optimized as a whole. It is not systematically put together (synthesized) in a step by step process.
• In some cases, a single-frequency circuit is synthesized systematically for use as the initial solution in a broadband design, but there is no guarantee that the specific circuit chosen is the optimum, or even a good choice, for the wide-band problem.
• Optimization problems are subject to the phenomenon of local minima and, therefore, the initial values assigned to the components. Even with a fixed topology, the chances of finding the global optimum to a practical, non-trivial microwave optimization problem are often poor.
• The optimum targets for the problem to be optimized are not known, at least not initially.
• Because only a single solution is optimized, no perspective is obtained on the problem solved.
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In the Amplifier Design Wizard, the basic point of departure is that one cannot rely only on optimization techniques to find close-to-optimum solutions. A solution to this problem is to find solutions by doing systematic searches. A simple grid search is, however, not the answer. In order to do the required search efficiently, the search must, in the first place, be done on the correct parameters and, secondly, it should be synthesis based. A number of the best solutions found in the systematic search are then optimized, after which the user can choose the best solution from the potential solutions presented.

The systematic searches also eliminate the initialization problem.

Overview

The MultiMatch ADW is comprised of various modules.

• Transistor Modeling and Modification Network Synthesis Module

  The capabilities provided in the Modeling Section include:

  • FET/BJT models can be fitted to the transistor S-parameter data.
  • Package parasitics can be specified for transistor models or can be optimized. Constraints can be set on the component values.
  • The noise performance can be modeled by using Fukui, Pucel and Pozpielaski noise models. The fitting factors associated with the different models can be optimized to improve the fit to the supplied noise parameter and S-parameter data. An extra fitting factor is provided to model the flat section in the noise performance.
  • The S-parameter and noise parameter data can be interpolated for more detailed analysis at crucial points. Extrapolation of the S-Parameter and noise-parameter data is allowed by using the fitted models.

  Modification sections can be synthesized or added manually to the transistor in the Modeling and Modification Module. A modification network consist of frequency selective resistive feedback and/or resistive loading sections. These sections are used to pre-condition the transistor for improved stability, flat gain response, lower VSWRs (before synthesizing the matching networks required), as well as to have low VSWRs at the same time as a low noise figure and/or high output power. Sophisticated modification network synthesis techniques are implemented in the Amplifier Design Wizard.

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• Analysis Module

  The S-parameters and noise parameters of any Multimatch circuit can be calculated in the Analysis Module (Extended cascade analysis, as well as nodal analysis are allowed). The stability of the circuit can also be evaluated. Stability analysis includes calculation of various stability factors, as well as loop gain and reflection analysis. While only linear circuits are analyzed, the 1-dB compression point of amplifiers can be estimated too. The performance of the drivers in an amplifier chain is also calculated. Optimization capabilities are also provided in the Analysis Module. These include optimization of the performance of a linear amplifier, as well as optimization of a model to fit a set of two-port parameters.

  Various wizards are incorporated into the Analysis Module. These wizards set up transistor modification problems, as well as a variety of impedance-matching problems. The problem defined by a wizard is then solved by using the relevant Synthesis Module.

  Note that load-pull contours can be generated by the CIL Wizard to find the 1dB-compression points of a transistor. The contours can be generated even when feedback or loading is applied to a transistor. (The transistor configuration may be changed too.) The default selection of the best point on each contour can be modified by the user. This allows greater control over the performance of the amplifier.

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• Impedance Matching Module

  The Impedance-Matching Module is used to synthesize lumped-element, distributed or mixed lumped/distributed matching networks. Wizards are provided to synthesize commensurate (equal line lengths) and non-commensurate networks.

  When commensurate networks are synthesized, the lengths of any main line sections, open-ended stubs or short-circuited stubs are specified by the user and the widths are used as variables. Different lengths may be used for the main line sections, open-ended stubs or short-circuited stubs. If the stub lengths are kept short, the stubs can be replaced with lumped components in the Analysis Module. The line widths or characteristic impedances can be constrained. It is a good idea to initially leave these unconstrained and to observe the impedance values required, as well as the performance that can be obtained when this is done.

  When non-commensurate networks are synthesized, the widths of any main line sections, open-ended stubs or short-circuited stubs are specified by the user and the line lengths are used as variables. Different widths may be used for the main line sections, open-ended stubs or short-circuited stubs. The minimum and maximum lengths of the main-line sections can be constrained. The minimum length constraint is often essential to ensure that the any stubs used are separated sufficiently. When mixed lumped/distributed networks are synthesized, pads can be specified for the lumped components too. The lumped components in these solutions are used to reduce the size of the network.

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Overview

Ultimate Performance. MultiMatch has a reputation for delivering first-time-right designs with performance superior to that attainable by other design techniques.

Much shorter design cycles. The synthesis techniques implemented lead to more robust designs that require less tuning and trial and error efforts to achieve the most challenging specifications. This translates into faster and fewer design cycles and hence increased productivity.

Comprehensive export capabilities. If required, the microstrip | stripline circuit designed can be processed further with a general-purpose microwave simulator. To ease the transition, the following export capabilities are provided:

• The S-parameters and the noise parameters of the Multimatch circuit analyzed can be exported in Touchstone^TM ".s1p" or ".s2p" format.
•  Microwave Office^TM schematic scripts can be created for most MultiMatch circuits.
• Sonnet Software® files can be created for the Multimatch artwork.
• The Multimatch artwork can be exported in DXF or HPGL format. The DXF files can be imported into many EM simulators, including CST^TM and Momentum^TM.
• Multimatch circuits can be exported as Super Compact^TM or Touchstone^TM nodal analysis circuit files.